In the lab, KAIST oxygen tunnel steadies 3D memory

More than 10 million cycles of harsh electrical stress put a new vertical memory transistor through its paces in a KAIST-led study. Its threshold-voltage shift stayed below 50 millivolts, a reliability result the researchers say addresses a central weakness of three-dimensional memory devices.

The problem begins with oxygen vacancies—missing oxygen atoms in an oxide semiconductor—that can destabilize a memory channel. Adding oxygen can repair the channel, but some oxygen may travel onward to the metal electrode and oxidize it. The channel needs oxygen; the electrode does not.

KAIST’s team, led by Professor Jimin Kwon, built a silicon nitride/silicon dioxide/silicon nitride layer, or SiN/SiO₂/SiN, to act as an “oxygen tunnel.” It is engineered to guide oxygen toward the vertical channel while blocking migration toward the electrode, tackling both defects and oxidation in the same structure. The researchers report high current density and data retention in the oxide vertical channel transistor, although the article does not provide the underlying numerical values for those measures.

The team then combined the oxide-semiconductor device with conventional silicon CMOS—complementary metal-oxide-semiconductor logic—to assess compute-in-memory, or CIM, systems that perform AI computation directly inside memory. The results suggest that the structure could support faster, more power-efficient AI semiconductors.

So what changes in practice? If the reliability result survives further testing and manufacturing, vertically stacked memory could become easier to use alongside silicon logic in AI hardware, reducing one obstacle to keeping data close to computation. For now, the concrete advance is narrower and more solid: a laboratory structure that controls oxygen migration and keeps a 3D memory transistor stable under repeated electrical stress.