UMass engineers cut edge AI resources by 90% in a lab language test

A language-identification task that can quietly drain a small device’s battery became a test bench for a different kind of chip. Researchers at the University of Massachusetts Amherst report a system that recognized written languages with 95.24% accuracy while reducing computing resources by 90%.

The team, led by electrical and computer engineering professor Qiangfei Xia, redesigned the algorithm and the hardware together. That pairing matters at the network’s edge, where smartphones, cameras, home automation hubs and car interfaces process data locally but cannot carry the computing capacity of a data center.

The algorithm is hyperdimensional computing, or HDC, a brain-inspired approach that works with large mathematical patterns rather than precise numbers. The hardware uses analog in-memory computing, in which memristors — components that store and process data in one physical location — reduce the need to shuttle information between separate memory and processing units.

The researchers also made use of a property usually treated as a problem: the natural variability of memristive devices. In this system, that randomness helps encode language features, turning chip variation into part of the computation rather than something to eliminate.

So what changes, concretely? A smaller, battery-powered device could handle language-related tasks with less computing demand. The work remains a laboratory proof of concept focused on written language. Spoken-language processing is a possible next step, and the figures come from the researchers’ demonstration rather than a product already operating in the field.