Wednesday, 21 October 2026Support us

Aube.

News of progress
Single source

SpacemiT unveils V100, a RISC-V chip aimed at data centers

Languages for this article
Original · ENESFRITPT

Originally written in English. 5 languages available; yours is one click away.

Illustrative photo: BalticServers data center
Illustrative photo: BalticServers.com · CC BY-SA 3.0 · Wikimedia Commons

On the stage of the RISC-V China Summit in Shenzhen, on October 19, SpacemiT did not bring just a processor. It brought three complete servers built around its new V100 chip, and a claim that matters more to data-center builders than any clock speed: the chip runs standard Linux without a custom build. The company presented the work with the XiangShan open-source processor team.

The problem it targets is an old one. Embedded RISC-V chips have typically needed a custom operating system build for each part, which makes them hard to slot into a server room, where operators expect ready-made software. SpacemiT says V100 implements five RISC-V server specifications, in silicon, firmware and the operating system alike: RVA23, Server SoC, Server Platform, Boot and Runtime Services (BRS), and a security model. It reports passing all BRS tests. The company names openEuler, openKylin, openRuyi, Debian, Ubuntu, Fedora, Red Hat and Rocky Linux as systems that install, boot and run directly.

The silicon is a 46-core hybrid. Six cores come from XiangShan, the Kunminghu V2R2 design, and 40 from SpacemiT's own X100. The chip runs at up to 2.4 GHz, drives eight DDR5 memory channels and offers 52 PCIe 5.0 lanes, the high-speed links that connect a processor to accelerators and storage. Two chips can be linked coherently for up to 92 cores. The flagship G5201 AI server carries eight full-height, double-width accelerator cards with high-speed RDMA networking, a method for moving data between machines with little overhead. SpacemiT says it has validated the setup with domestic accelerators, including Kunlunxin's M100.

For cloud operators, the pitch is isolation. V100 supports the RISC-V hypervisor (H) extension, AIA interrupt handling and an IOMMU, which together allow hardware virtualization of CPU, memory, interrupts and I/O. SpacemiT says these extensions already have native support in upstream Linux, so no custom kernel is needed. It is promoting lightweight micro-VMs as a way to isolate cloud AI agent workloads at close to container-level overhead. That is the company's own estimate, not an independent measurement.

What changes, and for whom? Partners building their own branded machines gain the most: SpacemiT is offering server motherboards, firmware, BMC management and hardware reference designs, so they need not start board design from scratch. The source gives no price, no delivery date and no named customer, and every specification and compliance claim comes from SpacemiT itself. The next proof is an independent test of those compliance claims, and a first server shipped to a real data center.

92cores when two V100 chips are linked coherently (46 per chip)

Sources — read the originals(Paris time)

PandailyEN
0000

Read next

Comments

Loading the thread…

Sign in to leave a comment. Sign in